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| (R) CT T ODU MEN E PR PLACE ter at LET D RE n O rt Ce m/tsc OBS ENDE uppo co OMM hnical S .intersil. EC Data Tec or NO R t our Sheet www IL ac cont -INTERS -888 1 EL7560 August 21, 1998 FN7294 Programmable CPU Power Supply Unit The EL7560 is the simplest, most cost effective method for powering modern high power CPUs which require a user adjustable output voltage. Although it is particularly designed to function with next generation CPUs, its simple design can provide low cost solutions for any 5V to 3V application. The circuit uses on chip resistorless current sensing for high efficiency, stable current mode control. An on chip temperature sensor resets the OT pin. The OT pin can be tied directly to the OUTEN pin for automatic overtemperature shutdown. The user can adjust the oscillator frequency as well as the slope compensation. The output voltage is adjustable using a 4-bit parallel interface. A power OK signal "PWRGD' pulls high when the FB pin is within -7% of the programmed value. Features * 3.3V @ 12.4amps continuous * Internal FETs * >90% efficiency * Synchronous switching * 4-bit digitally adjustable output voltage * User adjustable slope compensation * Internal soft start * Over temperature indicator * Low current sleep mode * Low parts count * Pulse by pulse current limiting * High efficiency at light load * Operates up to 1MHz Pinout EL7560 (28-PIN SOIC) TOP VIEW * 1% output accuracy * Sync function * Power good signal 5V Applications D2 1 CP1F C5 100 3 C2V +10V D1 1F C11 30 6 LX 7 LX 8 LX 9 LX 10 LX 11 TEST 12 PWRGD 13 OT 14 OUTEN R2 10K VIN 23 VSSP 22 VIN 21 VSSP 20 VSSP 19 VID0 18 VID1 17 VID2 16 VID3 15 OUTPUT VOLTAGE* SELECT PGND R1 4 VSS 5 VHI .1F C6 2.5H L1 4mF C10 COSC 25 10 VDD 24 .1F C1 .1F CSLOPE 26 2 CP+ FB 28 CREF 27 D3 R3 1K 4.7F C4 68p C7 220p C8 ACND L2 1.5H C9 2mF 5V * PC motherboards * Local high power CPU supplies Ordering Information PART NUMBER EL7560CM TEMP. RANGE -40C to +85C PACKAGE 28-Pin SOIC PKG. NO. MDP0027 VOUT +2V - 3.5V +5V * See VID Table on page 3 Note: * AGND and PGND should be connected at C10 * D3 is 1.235V reference. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL7560 Absolute Maximum Ratings (TA = 25C) Supply (VIN, VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Output Pins . . . . . . . . . . . . . . . -0.3V below GND, +0.3V above VDD Instantaneous Peak Output Current . . . . . . . . . . . . . . . . . . . . . .16A Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 135C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3W CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA DC Electrical Specifications PARAMETER V2X DACLSB FOSC FOSCTC VRAMP MSS IVID ICSLOPE IDD IDDOFF RDSON RDSONTC VOUT VRANGE ILMAX VOUT-TC VOUT-LINE VOUT-LOAD VOUT-TOT OTOFF OTHYS VPWRGD VDD-ON VDD-OFF NOTE: VDD = VIN = 5V, COSC = 1nF, CSLOPE = 68pF, TA = 25C, unless otherwise specified (Note 1) CONDITION VDD=5V, ILOAD=20mA MIN 8.0 0.095 105 0C 1. The oscillator and voltage doubler operate normally when VDD exceeds VDD-ON threshold, independent of the OUTEN logic level. 2 EL7560 Voltage Identification Codes P6 PINS VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 VID2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 VDC 0, No CPU 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3 EL7560 EL7560 Pin Descriptions PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 NOTE: 1. The oscillator and voltage doubler operate normally when VDD exceeds VDD-ON threshold, independent of the OUTEN logic level. NAME CPCP+ C2V VSS VHI LX LX LX LX LX TEST PWRGD OT OT VID3 VID2 VID1 VID0 VSSP VSSP VIN VSSP VIN VDD COSC CSLOPE CREF FB DESCRIPTION Negative input for the charge pump bootstrap capacitor. (Note 1) Positive input for the charge pump bootstrap capacitor. (Note 1) Voltage doubler output. Pin requires at least a 1F capacitor to GND. (Note 1) Ground return for the control circuitry. Positive supply for the high side driver. This pin is bootstrapped from the LX pin with a 0.1F capacitor. Common connection between the two large internal FETs. External inductor connection. Same as pin 6. Same as pin 6. Same as pin 6. Same as pin 6. This is test pin and must remain grounded at all times Pin pulls high when the FB pin is within - 7%(typ) of its programmed value. Overtemperature indicator. Pulls low when the die temperature exceeds 135C. Pin has 10mA pull-up. A logic high on OUTEN enables the regulator (Note 1) Bit 3(MSB) of the output voltage select DAC. Bit 2 of the output voltage select DAC. Bit 1 of the output voltage select DAC. Bit 0(LSB) of the output voltage select DAC. Ground return to the buck regulator. Same as pin 19. Positive power supply input to the buck regulator. Same as pin 19. Same as pin 21. Pin supplies power to the internal control circuitry. Oscillator timing capacitor. Oscillator Frequency is approximately: FOSC(Hz)=0.0001/COSC(F). The duty cycle is approximately 5%. (Note 1) Slope compensation capacitor. External reference input pin. Voltage feedback pin for the buck regulator. 4 EL7560 Typical Performance Curves IDD vs VDD 35 30 Frequency (kHz) 25 IDD (mA) 20 15 10 5 0 1 2 3 4 5 6 VDD (V) 10 10 10000 Oscillator Frequency vs COSC 1000 100 100 1000 10000 COSC (pF) ILine Regulation (VID3:0=0000) 3.545 TA=25C 3.535 3.525 VOUT (V) 3.515 3.505 3.495 3.485 3.475 3.465 4.4 IOUT = 11A IOUT = 8A IOUT = 0.3A 2.21 IOUT = 4A VOUT (V) 2.23 Line Regulation (VID3:0=1101) TA=25C 2.22 IOUT = 0.3A IOUT = 4A 2.20 2.19 IOUT = 8A 2.18 2.17 2.16 4.4 IOUT = 11A 4.6 4.8 5.0 VIN (V) 5.2 5.4 5.6 4.6 4.8 5.0 VIN (V) 5.2 5.4 5.6 Load Regulation (VID3:0=0000) 3.54 3.53 3.52 VOUT (V) 3.51 3.50 3.49 3.48 2.17 3.47 3.46 0 2 4 6 IOUT (A) 8 10 12 2.15 VIN=5V TA=25C 2.23 2.25 Load Regulation (VID3:0=1101) VIN=5V TA=25C VOUT (V) 2.21 2.19 0 2 4 6 IOUT (A) 8 10 12 5 EL7560 Typical Performance Curves VOUT vs CSLOPE 6 5 4 VOUT (%) VOUT (%) 3 DVOUT (%) 2 DVOUT (%) 1 DVOUT (%) 0 -1 0 50 100 150 200 250 CSLOPE (pF) 0 Line Reg (%) -1 0 50 100 150 200 250 CSLOPE (pF) 6 5 4 3 2 1 Load Reg (%) Line Reg (%) Load Reg (%) Line Reg (%) Load Reg (%) (Continued) VOUT vs CSLOPE RDSON vs Temp 39 y = 0.1006x + 23.766 37 35 33 31 29 27 25 20 Eficiency (%) RDSON (m) 90 85 95 Efficiency vs Output Current 3.5V 3.1V 80 2.1V 75 70 65 60 0.3 40 60 80 100 120 140 160 1 2 3 4 IOUT 5 8 11.2 12.4 Temperature(C) Transient Load Step 0.3Amp to 12.4Amp Switching Waveforms ILOAD = 2A 2V/div V(LX) VOUT 20mV/div 20mV/div VOUT 6 EL7560 EL7560 Functional Block Diagram To VOUT FB, Pin 28 PWRGD, Pin 12 VID [0:3], Pin 15,16,17,18 DAC + + CREF, Pin 27 VDD ISLOPE CSLOPE, Pin 26 + + LEB TDELAY VHI, Pin 5 VDD and VIN, Pin 21,23,24 4V VDD UVLO RSS VSSP, Pin 19,20,21 S Zero Cross Detect + COSC, Pin 25 + Over Temp Sensor VSS, Pin 4 R OT, Pin 13 + CSS VDD OUTEN, Pin 14 FF R + Cp-, Pin 1 V2X Cp+, Pin 2 C2V, Pin 3 Q R Q S LX, Pin 6,7,8,9,10 S Thermal considerations and power dissipation: To achieve the maximum 12.4A continuous output current, the EL7560 is packaged in a 28 pin HSOP (Heat-Slug SO Package). Within the package, the EL7560 die is attached to one side of a copper slug. The other side of the slug is coincident with the package top surface, and is therefore exposed to the ambient environment. The copper slug provides an exceptionally low thermal resistance (JC) of typically 7C/W. To obtain low junction to ambient thermal resistance (JA), a heatsink is required to provide heat transfer path from the die to the ambient. The EL7560 power dissipation is a direct function of the "on" resistance of the internal power FETs (Rds-on) and the output current. For the maximum 12.4A output current and the worse case Rds-on at 125C (35m), the power dissipation is Iout2*R = 5.38W. To maintain 12.4A continuous output current operation at the maximum 70C ambient temperature, the die temperature must be kept below the 135C thermal shut down temperature. This requires a JA of 12C/W. To help achieve such a low JA with practical size heatsink, airflow is also required. Application note #13 shows the 11C/W thermal resistance can be achieved with the Wakefield heatsink #8052-60 and minimum 200LFM airflow. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 7 |
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